
7
LTC1411
1411f
DVP (Pin 30): 5V Digital Power Supply Pin. Bypass to
OGND with a 10
F tantalum capacitor.
DGND (Pin 31): Digital Ground.
CONVST (Pin 32): Conversion Start Signal. This active
low signal starts a conversion on its falling edge.
PGA1, PGA0 (Pins 33, 34): Logic Inputs for Program-
mable Input Range. This ADC has four input ranges (or
four REFCOM2 voltages) controlled by these two pins.
For the logic inputs applied to PGA0 and PGA1, the
following summarizes the gain levels and the analog
input range with AIN– tied to 2.5V.
UU
U
PI FU CTIO S
Table 1. Input Spans for LTC1411
INPUT
REFCOM2
PGA0
PGA1
LEVEL
SPAN
VOLTAGE
5V
0dB
±1.8V
4V
5V
0V
– 3dB
±1.28V
2.9V
0V
5V
– 6dB
±0.9V
2V
0V
– 9dB
±0.64V
1.45V
NAP (Pin 35): Nap Input. Driving this pin low will put the
ADC in the Nap mode and will reduce the supply current to
2mA and the internal reference will remain active.
SLP (Pin 36): Sleep Input. Driving this pin low will put the
ADC in the Sleep mode and the ADC draws less than 1
A
of supply current.
WU
U
TYPICAL CO
ECTIO DIAGRA
OTR
5V OR 3V
D13
OGND
OVDD
CONTROL LOGIC
2.5V
BANDGAP
REFERENCE
INTERNAL
CLOCK
14-BIT
ADC
OUTPUT
DRIVERS
REFOUT
14
+
–
PGA0
PGA1
CONVST
DGND
1411 TA01
AIN
+
AIN
–
AVP
DVP
5V
NAP
SLP
+
AVM
7, 8, 9
3
REFIN
22
F*
10
F
10
F
2k
5k
2
1
32
33
34
35
36
11
AGND
*A 22
F CAPACITOR IS NEEDED IF REFOUT IS USED TO DRIVE AIN–
31
26
BUSY
27
D0
25
12
28
29
4
REFCOM1
5
REFCOM2
6
+
30
10
+
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X1.15